REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD53508
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 1999
PPMU Circuit
FUNCTIONAL BLOCK DIAGRAM
S11
S12
S13
S14
S15
S16
INT/IM
R1
R2
INTEGRATE
S10
UNITY
DIFF
VF S4
IF
S5
C1
1k⍀
2mA
10k⍀
200A
EXT RC
SENSE
S8
S9
S2
S3
VM
IM
ENABLE
S1
CON
+2.5V
S6
S7
DAC1
DAC2
DSR
MEAS
OUT
40pF
S17
GUARD
FORCE
SENSE
R
R
1.25R
1.25R
MAIN
GUARD
S18
AD53508
OUTPUT
FEATURES
Dual Measurement Channels
Precision Four-Quadrant-Per-Pin V/I Source
Programmable Current Force Ranges
ⴞ204.8 A and ⴞ2.048 mA
Five Current Measurement Ranges
204.8 nA to ⴞ2.048 mA
Output Voltage Range: –4 V to +9 V
Power Supplies: +15 V, +5 V, and –10 V
44-Lead Plastic J-Leaded Chip Carrier Package
APPLICATIONS
Can Be Used with the AD53032 DCL to Extend Current
Force Range to 35 mA
GENERAL DESCRIPTION
The AD53508 is a custom dual-channel parametric measure-
ment circuit for use in semiconductor automatic test equipment.
It contains programmable modes to force a pin voltage and
measure its current or to integrate and hold a current value.
Alternatively, a current can be forced and the compliance volt-
age measured.
The device provides a remote force/sense capability to ensure
accuracy at the tester pin. A guard output is available to drive
the shield of a force/sense pair.
Two input references per channel permit controlled switching to
different voltage or current levels. The forced voltage or current
levels can be switched back to the measurement system to read
back the analog levels for system calibration.
The circuit is powered by +15 V, +5 V and –10 V supplies and
dissipates 230 mW nominally.
Recommended Use of the PPMU with AD53032 DCL
The PPMU can be used with the AD53032 DCL to extend the
Current Force Range beyond 2 mA VCOM can be set to the
maximum spec allowance of 8 V, which would allow the maxi-
mum Current Force of IOL of 35 mA. The combination of the
PPMU and the DCL would have a few benefits including:
1. Accurately measuring low currents.
2. Can take parallel measurements by using one PMU per pin.
–2–
REV. 0
AD53508–SPECIFICATIONS
Parameter Condition Min Typ Max Unit
1
VOLTAGE FORCE/MEASURE MODE
Voltage Swing, ± 2 mA Range
± 2 mA Drive –4 +9 V
± 100 µA Drive –5 +12 V
ACCURACY
Gain (± 0.1% Tolerance) 0.999 1.001 V/V
Offset Error ± 15 mV
Gain Nonlinearity (Relative to Endpoints) ± 0.02 % of Span
Current Measure CMRR (at MEAS_OUT) ± 0.31 mV/V
DRIFT
Gain Error Temperature Coefficient ± 20 ppm (PV
or MV)/°C
Offset Drift ± 100 µV/°C
CURRENT FORCE/MEASURE MODE RANGES
0 (High) ± 2.0 mA
1 (Low) ± 200 µA
ACCURACY—HIGH RANGE
Transconductance (± 3% Tolerance) Force Mode 0.776 0.8 0.824 mA/V
Transresistance (± 3% Tolerance) Measure Mode 1.21 1.25 1.29 V/mA
Offset Error ± 40 µA
Gain Nonlinearity (Relative to Endpoints) ± 0.05 % of Span
Output Compliance Voltage-Induced
Transconductance/Error Force Mode –0.2 +0.4 µA/V
DRIFT—HIGH RANGE
Gain Error Temperature Coefficient +10/–60 ppm (PV
or MV)/°C
Offset Drift ± 400 nA/°C
ACCURACY—LOW RANGE
Transconductance (± 3% Tolerance) Force Mode 77.6 80 82.4 µA/V
Transresistance (± 3% Tolerance) Measure Mode 12.1 12.5 12.9 V/mA
Offset Error ± 4 µA
Gain Nonlinearity (Relative to Endpoints) ± 0.05 % of Span
Output Compliance Voltage-Induced
Transconductance/Error Force Mode –0.02 +0.04 µA/V
DRIFT—LOW RANGE
Gain Error Temperature Coefficient +10/–60 ppm (PV
or MV)/°C
Offset Drift ± 40 nA/°C
CURRENT MEASURE INTEGRATE MODE RANGES
High ± 20.0 µA
Medium ± 2.0 µA
Low ± 200 nA
ACCURACY—HIGH RANGE
Transresistance Error (± 3% Tolerance) 0.121 0.125 0.129 V/µA
Offset Error ± 400 nA
Gain Nonlinearity (Relative to Endpoints) ± 0.05 % of Span
Output Compliance Voltage-Induced Transresistance Error ± 2.5 nA/V of Output
DRIFT—HIGH RANGE
Gain Error Temperature Coefficient ± 20 ppm MV/°C
Offset Drift ± 2 nA/°C
ACCURACY—MEDIUM RANGE
Transresistance Error (± 3% Tolerance) 1.21 1.25 1.29 V/µA
Offset Error ± 40 nA
Gain Nonlinearity (Relative to Endpoints) ± 0.05 % of Span
Output Compliance Voltage-Induced Transresistance Error ± 0.25 nA/V of Output
DRIFT— MEDIUM RANGE
Gain Error Temperature Coefficient ± 20 ppm MV/°C
Offset Drift ± 250 pA/°C
(T
A
= 25ⴗC, rated power supplies unless otherwise noted)
–3–REV. 0
AD53508
Parameter Condition Min Typ Max Unit
1
ACCURACY—LOW RANGE
Transresistance Error (± 3% Tolerance) 0.0121 0.0125 0.0129 V/nA
Offset Error ± 4nA
Gain Nonlinearity (Relative to Endpoints) ± 0.05 % of Span
Output Compliance Voltage-Induced Transresistance Error ± 0.025 nA/V of Output
DRIFT—LOW RANGE
Gain Error Temperature Coefficient ± 20 ppm MV/°C
Offset Drift ± 70 pA/°C
DISABLE MODE
2
Voltage Swing, ± 2 mA Range
± 2 mA Drive –4 +9 V
± 100 µA Drive –5 +12 V
ACCURACY
Gain (± 0.1% Tolerance) 0.999 1.001 V/V
Offset Error ± 15 mV
Gain Nonlinearity (Relative to Endpoints) ± 0.02 % of Span
Current Measure CMRR (at MEAS_OUT) ± 0.31 mV/V
DRIFT
Gain Error Temperature Coefficient ± 20 ppm (PV or
MV)/°C
Offset Drift ± 100 µV/°C
OTHER SPECIFICATIONS
Power Supply Rejection Ratio f < 40 Hz, V
CC
70 dB
f < 40 Hz, V
EE
60 dB
f = 40 kHz, V
CC
35 dB
f = 40 kHz, V
EE
25 dB
CURRENT MEASURE HOLD MODE LEAKAGE T
AMB
= +70°C ± 1.2 nA
CROSSTALK
3
± 0.02 % of Span
SETTLING TIMES TO 0.01%
Voltage Force and Guard Voltage C
LOAD
= 100 pF 20 µs
C
LOAD
= 2000 pF 2 ms
Current Force (200 µA Range) Z
LOAD
= 100 pF储50 kΩ 50 µs
MEAS_OUT Pin C
LOAD
= 20 pF 2 µs
SHORT CIRCUIT CURRENT LIMIT MAGNITUDE Any Output Except Guards 8.5 20 mA
GUARD SCC LIMIT MAGNITUDE 2.5 10 mA
GUARD OFFSET (FROM SENSE INPUT PIN) –65 –25 0 mV
I
B
(DAC1, DAC2) CURRENT ± 1.0 µA
DIGITAL INPUTS
V
IH
2.4 V
V
IL
0.8 V
I
IN
(Input leakage current) 10 µA
POWER SUPPLIES
V
CC
(Positive Analog Supply Voltage) 14.0 15.0 15.75 V
V
EE
(Negative Analog Supply Voltage) –10.5 –10.0 –9.0 V
V
DD
(Logic Supply Voltage) 4.75 5.0 5.25 V
I
CC
(Positive Analog Supply Current) 5 15 mA
I
EE
(Negative Analog Supply Current) –15 –5 mA
I
DD
(Logic Supply Current Is 0 with Inputs at Rails,
Worst Case @ 2.4 V
IN
) 8mA
NOTES
1
PV = Programmed Value, MV = Measured Value, FSR = Full-Scale Range = span.
2
Output connected: DAC2 and 2 mA range selected, unconditionally.
3
f < 40 Hz, both channels in current force mode; other channel output voltage swinging rail to rail.
Specifications subject to change without notice.
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